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A simple dynamic circuit model for MOS structureCHUA, L. O; CHWEN-CHER CHANG.International journal of circuit theory and applications. 1987, Vol 15, Num 2, pp 143-170, issn 0098-9886Article

Globale Aspekte homokliner BahnenKAHLERT, C.AEU. Archiv für Elektronik und Übertragungstechnik. 1992, Vol 46, Num 4, pp 266-273, issn 0001-1096Article

On-line training of recurrent neural networks with continuous topology adaptationOBRADOVIC, D.IEEE transactions on neural networks. 1996, Vol 7, Num 1, pp 222-228, issn 1045-9227Article

Multivalued dynamic circuitsHUERTAS, J. L; BARRIGA, A; SANCHEZ-GOMEZ, G et al.Electronics Letters. 1987, Vol 23, Num 10, pp 502-504, issn 0013-5194Article

Dynamics of π-junction interferometer circuitsKORNEV, V. K; BORISENKO, I. V; MOZHAEV, P. B et al.Physica. C. Superconductivity and its applications. 2002, Vol 367, Num 1-4, pp 285-289Article

On linear dynamic complementary systemsLEENAERTS, D. M. W.IEEE transactions on circuits and systems. 1, Fundamental theory and applications. 1999, Vol 46, Num 8, pp 1022-1026, issn 1057-7122Article

Indices de qualité généralisés de cellules actives du 2ème ordreMASLENNIKOV, V. V.Radiotehnika (Moskva). 1988, Num 6, pp 28-31, issn 0033-8486Article

On a conjecture regarding the synchronization in an array of linearly coupled dynamical systemsWU, C. W; CHUA, L. O.IEEE transactions on circuits and systems. 1, Fundamental theory and applications. 1996, Vol 43, Num 2, pp 161-165, issn 1057-7122Article

The influence of rocker-switch dynamics on contact bounceMCBRIDE, J. W; MAPPS, D. J; WHITE, P. J et al.IEEE transactions on components, hybrids, and manufacturing technology. 1988, Vol 11, Num 1, pp 137-144, issn 0148-6411Article

A burn-in tolerant dynamic circuit techniqueALVANDPOUR, A; KRISHRTMIURTHY, R; BORKAR, S et al.Custom integrated circuits conference. 2002, pp 81-84, isbn 0-7803-7250-6, 4 p.Conference Paper

Leakage-Biased Domino circuits for dynamic fine-grain leakage reductionHEO, Seongmoo; ASANOVIC, Krste.2002 symposium on VLSI circuits. 2002, pp 316-319, isbn 0-7803-7310-3, 4 p.Conference Paper

IAPDL-based low-power adiabatic programmable logic arrayLAU, K. T; LIU, F.Microelectronics journal. 2000, Vol 31, Num 4, pp 235-238, issn 0959-8324Article

Optical approach of automatic dynamic range limitationWANG, J; LU, Z; NI, X et al.IEE proceedings. Optoelectronics. 1998, Vol 145, Num 3, pp 201-204, issn 1350-2433Article

Runtime reconfigurable routingBREBNER, G; DONLIN, A.Lecture notes in computer science. 1998, pp 25-30, issn 0302-9743, isbn 3-540-64359-1Conference Paper

BiCMOS domino : a novel high-speed dynamic BiCMOS logicMENON, S. M; JAYASUMANA, A. P; MALAIYA, Y. K et al.International journal of electronics. 1997, Vol 83, Num 2, pp 177-189, issn 0020-7217Article

Analysis of linear dynamic circuits by conjugating the subprocesses in their subcircuitsSHAKIROV, M. A.Journal of communications technology & electronics. 1996, Vol 41, Num 4, pp 331-340, issn 1064-2269Article

GaAs pipelined dynamic logicHOE, D. H. K; SALAMA, C. A. T.Integration (Amsterdam). 1991, Vol 12, Num 1, pp 93-105, issn 0167-9260Article

MMAPC: an extensive mixed-mode circuit simulator using dynamic circuit partition processCHEN, B; ONODA, M; KANEKO, M et al.Transactions of the Institute of Electronics and Communication Engineers of Japan. Section E. 1988, Vol 71, Num 4, pp 388-393, issn 0387-236XArticle

Designing robust asynchronous circuit componentsMOHAMMADI, S; FURBER, S; GARSIDE, J et al.IEE proceedings. Circuits, devices and systems. 2003, Vol 150, Num 3, pp 161-166, issn 1350-2409, 6 p.Article

Analysis of blocking dynamic circuitsTHORP, Tyler; LIU, Dean.Proceedings, IEEE International Conference on Computer Design. 2002, pp 122-124, issn 1063-6404, isbn 0-7695-1700-5, 3 p.Conference Paper

Ternary dynamic differential no-race logicHERRFELD, A; HENTSCHKE, S.International journal of electronics. 1995, Vol 79, Num 1, pp 63-79, issn 0020-7217Article

Nonlinear dynamic maximum power theoremWYATT, J. L. JR.IEEE transactions on circuits and systems. 1988, Vol 35, Num 5, pp 563-566, issn 0098-4094Article

Verification of dynamically reconfigurable logicROBINSON, D; LYSAGHT, P.Lecture notes in computer science. 2000, pp 141-150, issn 0302-9743, isbn 3-540-67899-9Conference Paper

Extending Dynamic Circuit Switching to meet the challenges of new FPGA architecturesGREGOR, G. M. C; LYSAGHT, P.Lecture notes in computer science. 1997, pp 31-40, issn 0302-9743, isbn 3-540-63465-7Conference Paper

Chaos and structures in a chain of mutually-coupled Chua's circuitsOSIPOV, G. V; SHALFEEV, V. D.IEEE transactions on circuits and systems. 1, Fundamental theory and applications. 1995, Vol 42, Num 10, pp 693-699, issn 1057-7122Article

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